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ICS
2004
Tsinghua U.
15 years 3 months ago
Evaluating support for global address space languages on the Cray X1
The Cray X1 was recently introduced as the first in a new line of parallel systems to combine high-bandwidth vector processing with an MPP system architecture. Alongside capabili...
Christian Bell, Wei-Yu Chen, Dan Bonachea, Katheri...
ASPDAC
2004
ACM
107views Hardware» more  ASPDAC 2004»
15 years 3 months ago
Fast, predictable and low energy memory references through architecture-aware compilation
The design of future high-performance embedded systems is hampered by two problems: First, the required hardware needs more energy than is available from batteries. Second, curren...
Peter Marwedel, Lars Wehmeyer, Manish Verma, Stefa...
ATVA
2006
Springer
206views Hardware» more  ATVA 2006»
15 years 1 months ago
Compositional Reasoning for Hardware/Software Co-verification
In this paper, we present and illustrate an approach to compositional reasoning for hardware/software co-verification of embedded systems. The major challenges in compositional rea...
Fei Xie, Guowu Yang, Xiaoyu Song
DATE
2003
IEEE
92views Hardware» more  DATE 2003»
15 years 2 months ago
An Integrated Approach for Improving Cache Behavior
The widening gap between processor and memory speeds renders data locality optimization a very important issue in data-intensive embedded applications. Throughout the years hardwa...
Gokhan Memik, Mahmut T. Kandemir, Alok N. Choudhar...
TACO
2008
130views more  TACO 2008»
14 years 9 months ago
Efficient hardware code generation for FPGAs
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
Zhi Guo, Walid A. Najjar, Betul Buyukkurt