153 search results - page 15 / 31 » An experimental study of greedy routing algorithms |
ICS
1999
Tsinghua U.
15 years 1 months ago
1999
Tsinghua U.
Instruction scheduling is an important compiler technique for exploiting more instruction-level parallelism (ILP) in high-performance microprocessors, and in this paper, we study ...
ISVLSI
2003
IEEE
15 years 2 months ago
2003
IEEE
The “chicken-egg” dilemma between VLSI interconnect timing optimization and delay calculation suggests an iterative approach. We separate interconnect timing transformation as...
ATS
2004
IEEE
15 years 1 months ago
2004
IEEE
In this paper, we propose a low-power testing methodology for the scan-based BIST. A smoother is included in the test pattern generator (TPG) to reduce average power consumption d...
102
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AOR
2010
14 years 7 months ago
2010
Column generation algorithms have been specially designed for solving mathematical programs with a huge number of variables. Unfortunately, this method suffers from slow convergen...
GCC
2003
Springer
15 years 2 months ago
2003
Springer
Due to their minimum consideration to an actual network topology, the existing peer-to-peer (P2P) overlay networks will lead to high latency and low efficiency. In TaChord, we pres...