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» An improvement in formal verification
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ACSD
2001
IEEE
134views Hardware» more  ACSD 2001»
15 years 5 months ago
Embedding Imperative Synchronous Languages in Interactive Theorem Provers
We present a new way to define the semantics of imperative synchronous languages by means of separating the control and the data flow. The control flow is defined by predicates th...
Klaus Schneider
AICCSA
2001
IEEE
131views Hardware» more  AICCSA 2001»
15 years 5 months ago
Constraint-Based Timetabling-A Case Study
This paper2 details the stages of building a substantial, carefully specified, fully tested and fully operational university and school timetabling system. This is reported as a c...
Abdulwahed M. Abbas, Edward P. K. Tsang
FMCAD
2000
Springer
15 years 5 months ago
B2M: A Semantic Based Tool for BLIF Hardware Descriptions
BLIF is a hardware description language designed for the hierarchical description of sequential circuits. We give a denotational semantics for BLIF-MV, a popular dialect of BLIF, t...
David A. Basin, Stefan Friedrich, Sebastian Mö...
BPM
2006
Springer
149views Business» more  BPM 2006»
15 years 3 months ago
Verifying BPEL Workflows Under Authorisation Constraints
Abstract. Business Process Execution Language (BPEL), or Web Services BPEL (WS-BPEL), is the standard for specifying workflow process definition using web services. Research on for...
Zhao Xiangpeng, Antonio Cerone, Padmanabhan Krishn...
FDL
2008
IEEE
15 years 3 months ago
RTL Generation of Channel Architecture Templates for a Template-based SoC Design Flow
In this paper, we propose the design methodology for communication channel templates from formal specification to RTL description. In this flow, design and verification start from...
Jinhyun Cho, Soonwoo Choi, Soo Chae