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» An improvement in formal verification
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TCAD
2010
102views more  TCAD 2010»
14 years 8 months ago
Functional Test Generation Using Efficient Property Clustering and Learning Techniques
Abstract--Functional verification is one of the major bottlenecks in system-on-chip design due to the combined effects of increasing complexity and lack of automated techniques for...
Mingsong Chen, Prabhat Mishra
113
Voted
TIT
2010
150views Education» more  TIT 2010»
14 years 8 months ago
Information-theoretic key agreement of multiple terminals: part I
This is the first part of a two-part paper on information-theoretically secure secret key agreement. In this part, we study the secrecy problem under the widely studied source mod...
Amin Aminzadeh Gohari, Venkat Anantharam
DAC
2011
ACM
14 years 1 months ago
Efficient incremental analysis of on-chip power grid via sparse approximation
In this paper, a new sparse approximation technique is proposed for incremental power grid analysis. Our proposed method is motivated by the observation that when a power grid net...
Pei Sun, Xin Li, Ming Yuan Ting
DAC
2011
ACM
14 years 1 months ago
Rethinking memory redundancy: optimal bit cell repair for maximum-information storage
SRAM design has been a major challenge for nanoscale manufacturing technology. We propose a new bit cell repair scheme for designing maximum-information memory system (MIMS). Unli...
Xin Li
PR
2006
167views more  PR 2006»
15 years 1 months ago
Database, protocols and tools for evaluating score-level fusion algorithms in biometric authentication
Fusing the scores of several biometric systems is a very promising approach to improve the overall system's accuracy. Despite many works in the literature, it is surprising t...
Norman Poh, Samy Bengio