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» An improvement in formal verification
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ICCD
2004
IEEE
100views Hardware» more  ICCD 2004»
15 years 10 months ago
Layout Driven Optimization of Datapath Circuits using Arithmetic Reasoning
This paper proposes a new formalism for layout-driven optimization of datapaths. It is based on preserving an arithmetic bit level representation of the arithmetic circuit portion...
Ingmar Neumann, Dominik Stoffel, Kolja Sulimma, Mi...
ICCAD
2008
IEEE
129views Hardware» more  ICCAD 2008»
15 years 10 months ago
A capacitance solver for incremental variation-aware extraction
Abstract—Lithographic limitations and manufacturing uncertainties are resulting in fabricated shapes on wafer that are topologically equivalent, but geometrically different from ...
Tarek A. El-Moselhy, Ibrahim M. Elfadel, Luca Dani...
ICCAD
2008
IEEE
125views Hardware» more  ICCAD 2008»
15 years 10 months ago
A succinct memory model for automated design debugging
— In today’s complex SoC designs, verification and debugging are becoming ever more crucial and increasingly timeconsuming tasks. The prevalence of embedded memories adds to t...
Brian Keng, Hratch Mangassarian, Andreas G. Veneri...
ICCAD
2008
IEEE
151views Hardware» more  ICCAD 2008»
15 years 10 months ago
Race analysis for SystemC using model checking
—SystemC is a system-level modeling language that offers a wide range of features to describe concurrent systems rent levels of abstraction. The SystemC standard permits simulato...
Nicolas Blanc, Daniel Kroening
SOSP
2009
ACM
15 years 10 months ago
Automatic device driver synthesis with termite
Faulty device drivers cause significant damage through down time and data loss. The problem can be mitigated by an improved driver development process that guarantees correctness...
Leonid Ryzhyk, Peter Chubb, Ihor Kuz, Etienne Le S...