2488 search results - page 89 / 498 » An improvement in formal verification |
109
Voted
FMCAD
2004
Springer
15 years 4 months ago
2004
Springer
In this paper we demonstrate a potential extension of formal verification methodology in order to deal with time-domain properties of analog and mixed-signal circuits whose dynamic...
105
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DAC
2002
ACM
16 years 1 months ago
2002
ACM
This paper presents novel uses of functional interface specifications for verifying RTL designs. We demonstrate how a simulation environment, a correctness checker, and a function...
86
Voted
IWFM
1998
15 years 2 months ago
1998
In this paper, we present a proof that the bitonic sort is sound using PVS, a powerful specification and verification environment. First, we briefly introduce this well-known para...
110
Voted
IFIP
2010
Springer
14 years 7 months ago
2010
Springer
The Trusted Platform Module (TPM) is a hardware chip designed to enable computers to achieve a greater level of security than is possible in software alone. To this end, the TPM pr...
119
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CCS
2009
ACM
15 years 4 months ago
2009
ACM
We present an approach for the design and analysis of an electronic voting machine based on a novel combination of formal verification and systematic testing. The system was desig...