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» An improvement in formal verification
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125
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FMCAD
1998
Springer
15 years 5 months ago
Combining Symbolic Model Checking with Uninterpreted Functions for Out-of-Order Processor Verification
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...
Sergey Berezin, Armin Biere, Edmund M. Clarke, Yun...
103
Voted
FMCAD
2007
Springer
15 years 4 months ago
Transaction Based Modeling and Verification of Hardware Protocols
Modeling hardware through atomic guard/action transitions with interleaving semantics is popular, owing to the conceptual clarity of modeling and verifying the high level behavior ...
Xiaofang Chen, Steven M. German, Ganesh Gopalakris...
119
Voted
CIIA
2009
15 years 1 months ago
LCF-style for Secure Verification Platform based on Multiway Decision Graphs
Abstract. Formal verification of digital systems is achieved, today, using one of two main approaches: states exploration (mainly model checking and equivalence checking) or deduct...
Sa'ed Abed, Otmane Aït Mohamed
104
Voted
FUIN
2006
85views more  FUIN 2006»
15 years 21 days ago
Towards Integrated Verification of Timed Transition Models
Abstract. This paper describes an attempt to combine theorem proving and model-checking to formally verify real-time systems in a discrete time setting. The Timed Automata Modeling...
Mark Lawford, Vera Pantelic, Hong Zhang
93
Voted
CCS
2006
ACM
15 years 4 months ago
Bridging the gap between web application firewalls and web applications
Web applications are the Achilles heel of our current ICT infrastructure. NIST's national vulnerability database clearly shows that the percentage of vulnerabilities located ...
Lieven Desmet, Frank Piessens, Wouter Joosen, Pier...