443 search results - page 12 / 89 » An interconnection architecture for micropayment systems |
84
Voted
HPCC
2009
Springer
15 years 4 months ago
2009
Springer
—The potential for destructive interference between running processes is increased as Chip Multiprocessors (CMPs) share more on-chip resources. We believe that understanding the ...
94
Voted
ISPASS
2009
IEEE
15 years 6 months ago
2009
IEEE
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
DAC
2000
ACM
16 years 19 days ago
2000
ACM
Latency insensitive design has been recently proposed in literature as a way to design complex digital systems, whose functional behavior is robust with respect to arbitrary varia...
VLSID
2005
IEEE
16 years 1 days ago
2005
IEEE
Designing NoC-based systems has become increasingly complex with support for multiple functionalities. Decisions regarding interconnections between the heterogeneous system compon...
DFT
1999
IEEE
15 years 4 months ago
1999
IEEE
The inherent redundancy and in-the-field reconfiguration capabilities of field programmable gate arrays (FPGAs) provide alternatives to integrated circuit redundancy-based fault r...