443 search results - page 29 / 89 » An interconnection architecture for micropayment systems |
CSMR
2004
IEEE
15 years 3 months ago
2004
IEEE
A Web site is a hyperlinked network environment, which consists of hundreds of inter-connected pages, usually without an engineered architecture. This is often a large, complex We...
ASAP
2003
IEEE
15 years 5 months ago
2003
IEEE
On-chip implementation of multiprocessor systems requires the planarization of the interconnect network onto the silicon floorplan. Manual floorplanning approaches will become i...
106
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DAC
1989
ACM
15 years 3 months ago
1989
ACM
- New algorithms for high-level synthesis are presented. The first performs scheduling under hardware resource constraints and improves on commonly used list scheduling techniques ...
ICCD
2000
IEEE
15 years 4 months ago
2000
IEEE
When proposing new architectural enhancements, it is also important to account for the hardware complexity. To achieve this goal, we propose to model the new design in a hardware ...
114
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CDES
2008
15 years 1 months ago
2008
Although directory-based cache coherence protocols are the best choice when designing chip multiprocessor architectures (CMPs) with tens of processor cores on chip, the memory ove...