Sciweavers

443 search results - page 37 / 89
» An interconnection architecture for micropayment systems
Sort
View
ETFA
2006
IEEE
15 years 5 months ago
Investigating Connector Faults in the Time-Triggered Architecture
In the context of distributed real-time systems as deployed in the avionic and the automotive domain a substantial number of system malfunctions result from connector faults. For ...
Philipp Peti, Roman Obermaisser, Harald Paulitsch
ICCAD
2002
IEEE
154views Hardware» more  ICCAD 2002»
15 years 8 months ago
Concurrent flip-flop and repeater insertion for high performance integrated circuits
For many years, CMOS process scaling has allowed a steady increase in the operating frequency and integration density of integrated circuits. Only recently, however, have we reach...
Pasquale Cocchini
IPPS
2000
IEEE
15 years 4 months ago
Optoelectronic Multi-chip Modules Based on Imaging Fiber Bundle Structures
In this paper, we present a new packaging architecture for chip-level optical interconnections based on imaging fiber bundles. Imaging fiber bundles consist of densely packed arra...
Donald M. Chiarulli, Steven P. Levitan
109
Voted
CASES
2005
ACM
15 years 1 months ago
SECA: security-enhanced communication architecture
In this work, we propose and investigate the idea of enhancing a System-on-Chip (SoC) communication architecture (the fabric that integrates system components and carries the comm...
Joel Coburn, Srivaths Ravi, Anand Raghunathan, Sri...
SBCCI
2003
ACM
96views VLSI» more  SBCCI 2003»
15 years 5 months ago
SoCIN: A Parametric and Scalable Network-on-Chip
Networks-on-Chip (NoCs) interconnection architectures to be used in future billion-transistor Systems-on-Chip (SoCs) meet the major communication requirements of these systems, of...
Cesar Albenes Zeferino, Altamiro Amadeu Susin