443 search results - page 5 / 89 » An interconnection architecture for micropayment systems |
72
Voted
SLIP
2003
ACM
15 years 4 months ago
2003
ACM
The problem of interconnect architecture arises when an array of processors needs to be integrated on one chip. With the deep sub-micron technology, devices become cheap while wir...
93
Voted
ICCAD
2005
IEEE
15 years 8 months ago
2005
IEEE
Future inter- and intra-ULSI interconnect systems demand extremely high data rates as well as bi-directional multi-I/O concurrent service, re-configurable computing/processing arc...
111
Voted
ICCD
2006
IEEE
15 years 8 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
116
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CODES
2003
IEEE
15 years 5 months ago
2003
IEEE
Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prev...
89
Voted
DATE
2000
IEEE
15 years 4 months ago
2000
IEEE
This paper presents an architectural study of a scalable system-level interconnection template. We explain why the shared bus, which is today's dominant template, will not me...