443 search results - page 85 / 89 » An interconnection architecture for micropayment systems |
87
Voted
MICRO
2009
IEEE
15 years 4 months ago
2009
IEEE
Hardware support for dynamic analysis can minimize the performance overhead of useful applications such as security checks, debugging, and profiling. To eliminate implementation ...
ASAP
2005
IEEE
15 years 3 months ago
2005
IEEE
In this paper we introduce a design methodology that allows the system/circuit designer to build reliable systems out of unreliable nano-scale components. The central point of our...
CF
2010
ACM
15 years 25 days ago
2010
ACM
: The SpiNNaker machine is a massively parallel computing system, consisting of 1,000,000 cores. From one perspective, it has a place in Flynns' taxonomy: it is a straightforw...
95
Voted
ICCAD
2008
IEEE
15 years 6 months ago
2008
IEEE
— As transistor sizes continue to shrink and the number of transistors per chip keeps increasing, chip multiprocessors (CMPs) are becoming a promising alternative to remain on th...
IEEEPACT
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—As programmers are asked to manage more complicated parallel machines, it is likely that they will become increasingly dependent on tools such as multi-threaded data rac...