Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
This paper introduces the notion of a Flexible Instruction Processor (FIP) for systematic customisation of instruction processor design and implementation. The features of our app...
: Nowadays, the design of so-called consistent time-stepping schemes that basically feature a physically correct time integration, is still a state-of-the-art topic in the area of ...
Rouven Mohr, Tom Bobach, Younis Hijazi, Gerd Reis,...
This paper studies security for data aggregation in sensor networks. Current aggregation schemes were designed without security in mind and there are easy attacks against them. We...
Modern CAD systems allow the designers to come up with powerful programmable datapaths in avery short time. The time to develop compilers for this datapaths is much longer. This p...