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» An operational happens-before memory model
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SPIN
2010
Springer
14 years 8 months ago
An Automata-Based Symbolic Approach for Verifying Programs on Relaxed Memory Models
This paper addresses the problem of verifying programs for the relaxed memory models implemented in modern processors. Specifically, it considers the TSO (Total Store Order) relax...
Alexander Linden, Pierre Wolper
68
Voted
PPL
2008
117views more  PPL 2008»
14 years 9 months ago
Operating Systems in silicon and the Dynamic Management of Resources in Many-Core Chips
This discussion paper explores the problems of operating systems support when implementing concurrency controls at the level of the instruction set in processors designed for mult...
Chris R. Jesshope
CGF
2008
125views more  CGF 2008»
14 years 9 months ago
Interactive Visualization for Memory Reference Traces
We present the Memory Trace Visualizer (MTV), a tool that provides interactive visualization and analysis of the sequence of memory operations performed by a program as it runs. A...
A. N. M. Imroz Choudhury, Kristin C. Potter, Steve...
TABLEAUX
2009
Springer
15 years 4 months ago
Tableaux and Model Checking for Memory Logics
Memory logics are modal logics whose semantics is specified in terms of relational models enriched with additional data structure to represent memory. The logical language is then...
Carlos Areces, Diego Figueira, Daniel Gorín...
88
Voted
MICRO
2010
IEEE
202views Hardware» more  MICRO 2010»
14 years 4 months ago
Hardware Support for Relaxed Concurrency Control in Transactional Memory
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
Utku Aydonat, Tarek S. Abdelrahman