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WCET
2008
14 years 11 months ago
Traces as a Solution to Pessimism and Modeling Costs in WCET Analysis
WCET analysis models for superscalar out-of-order CPUs generally need to be pessimistic in order to account for a wide range of possible dynamic behavior. CPU hardware modificatio...
Jack Whitham, Neil C. Audsley
ISCAS
2005
IEEE
154views Hardware» more  ISCAS 2005»
15 years 3 months ago
An automated methodology for memory-conscious mapping of DSP applications on coarse-grain reconfigurable arrays
—This paper presents a memory-conscious mapping methodology of computational intensive applications on coarse-grain reconfigurable arrays. By exploiting the inherent abundant amo...
Michalis D. Galanis, Gregory Dimitroulakos, Consta...
JCP
2008
155views more  JCP 2008»
14 years 9 months ago
Algorithm to Optimize Code Size and Energy Consumption in Real Time Embedded System
Processor is an important computing element in portable battery operated real time embedded system and it consumes most of the battery energy. Energy consumption, processor memory ...
Santosh D. Chede, Kishore D. Kulat
JSA
2006
113views more  JSA 2006»
14 years 9 months ago
A power-efficient TCAM architecture for network forwarding tables
Stringent memory access and search speed requirements are two of the main bottlenecks in wire speed processing. Most viable search engines are implemented in content addressable m...
Taskin Koçak, Faysal Basci
ICPP
2008
IEEE
15 years 4 months ago
Scalable Dynamic Load Balancing Using UPC
An asynchronous work-stealing implementation of dynamic load balance is implemented using Unified Parallel C (UPC) and evaluated using the Unbalanced Tree Search (UTS) benchmark ...
Stephen Olivier, Jan Prins