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3120
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An optimal architecture for a DDC
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DAC
1994
ACM
118
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Computer Architecture
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DAC 1994
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A Global Router Optimizing Timing and Area for High-Speed Bipolar LSI's
13 years 10 months ago
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Ikuo Harada, Hitoshi Kitazawa
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DAC
1992
ACM
105
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Computer Architecture
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DAC 1992
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A Near Optimal Algorithm for Technology Mapping Minimizing Area under Delay Constraints
13 years 10 months ago
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Kamal Chaudhary, Massoud Pedram
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DAC
1992
ACM
100
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Computer Architecture
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DAC 1992
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Recurrence Equations and the Optimization of Synchronous Logic Circuits
13 years 10 months ago
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Maurizio Damiani, Giovanni De Micheli
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DAC
1995
ACM
89
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Computer Architecture
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DAC 1995
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A Fresh Look at Retiming Via Clock Skew Optimization
13 years 10 months ago
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www.ece.umn.edu
Rahul B. Deokar, Sachin S. Sapatnekar
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DAC
2005
ACM
94
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Computer Architecture
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DAC 2005
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A unified optimization framework for equalization filter synthesis
13 years 8 months ago
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www.cs.york.ac.uk
Jihong Ren, Mark R. Greenstreet
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