3120 search results - page 31 / 624 » An optimal architecture for a DDC |
287
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DAC
2012
ACM
13 years 10 days ago
2012
ACM
We develop a projected-subgradient primal-dual Lagrange optimization for global placement, that can be instantiated with a variety of interconnect models. It decomposes the origin...
IPPS
1998
IEEE
15 years 2 months ago
1998
IEEE
In distributed-memory message-passing architectures reducing communication cost is extremely important. In this paper, we present a technique to optimize communication globally. O...
DAC
1998
ACM
15 years 2 months ago
1998
ACM
Carry-save-adder CSA is the most often used type of operation in implementing a fast computation of arithmetics of register-transfer level design in industry. This paper establis...
EOR
2007
14 years 10 months ago
2007
In this paper, we suggest a parallel algorithm based on a shared memory SIMD architecture for solving an n item subset-sum problem in time O(2n/2 /p) by using p = 2q processors, 0...
108
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ISCAS
2011
IEEE
14 years 1 months ago
2011
IEEE
— The last two decades have seen many efficient algorithms and architectures for the design of low-complexity bit-parallel Multiple Constant Multiplications (MCM) operation, tha...