3120 search results - page 37 / 624 » An optimal architecture for a DDC |
FPGA
2008
ACM
14 years 11 months ago
2008
ACM
This paper describes the Amorphous FPGA, an innovative architecture attempting to optimally allocate logic and routing resource on per-mapping basis. Designed for high performance...
ERSA
2006
14 years 11 months ago
2006
In a coarse-grained reconfigurable architecture, the functions of resources such as Arithmetic Logic Units (ALUs) can be reconfigured. Unlike the programmability of a general purp...
WICSA
2001
14 years 11 months ago
2001
Software development is a constant endeavor to optimize qualities like performance and robustness while ensuring functional correctness. Architecture Description Languages (ADLs) ...
WSCG
2003
14 years 11 months ago
2003
We present novel algorithms for efficient hierarchical collision detection and propose a hardware architecture for a single-chip accelerator. We use a hierarchy of bounding volum...
ICCAD
1998
IEEE
15 years 2 months ago
1998
IEEE
Abstract Althoughtremendousadvanceshave been accomplished in logic synthesis in the past two decades, in some cases logic synthesis still cannot attain the improvements possible by...