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» An optimal architecture for a DDC
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CASES
2001
ACM
15 years 1 months ago
Application specific architectures: a recipe for fast, flexible and power efficient designs
The general purpose processor has long been the focus of intense optimization efforts that have resulted in an impressive doubling of performance every 18 months. However, recent ...
Christopher T. Weaver, Rajeev Krishna, Lisa Wu, To...
ICDCS
2009
IEEE
14 years 7 months ago
The Case for Spam-Aware High Performance Mail Server Architecture
The email volume per mailbox has largely remained low and unchanged in the past several decades, and hence mail server performance has largely remained a secondary issue. The stee...
Abhinav Pathak, Syed Ali Raza Jafri, Y. Charlie Hu
DSRT
1998
IEEE
15 years 2 months ago
A Network Architecture for Remote Rendering
Internet-based virtual environments (VEs) let users explore multiple virtual worlds with many different geometric models which are downloaded rather than predistributed. To avoid ...
Gerd Hesina, Dieter Schmalstieg
MICRO
2010
IEEE
140views Hardware» more  MICRO 2010»
14 years 7 months ago
Moneta: A High-Performance Storage Array Architecture for Next-Generation, Non-volatile Memories
Emerging non-volatile memory technologies such as phase change memory (PCM) promise to increase storage system performance by a wide margin relative to both conventional disks and ...
Adrian M. Caulfield, Arup De, Joel Coburn, Todor I...
ISCA
2011
IEEE
287views Hardware» more  ISCA 2011»
14 years 1 months ago
Scalable power control for many-core architectures running multi-threaded applications
Optimizing the performance of a multi-core microprocessor within a power budget has recently received a lot of attention. However, most existing solutions are centralized and cann...
Kai Ma, Xue Li, Ming Chen, Xiaorui Wang