3120 search results - page 43 / 624 » An optimal architecture for a DDC |
DATE
2000
IEEE
15 years 2 months ago
2000
IEEE
– A split-bus architecture is proposed to improve the power dissipation for global data exchange among a set of modules. The resulting bus splitting problem is formulated and sol...
IJCAI
2001
14 years 11 months ago
2001
Software design is the hardest part of creating intelligent agents. Therefore agent architectures should be optimized as design tools. This paper presents an architectural synthes...
JUCS
2007
14 years 9 months ago
2007
: This article presents an architecture that encrypts data with the AES algorithm. This architecture can be implemented on the Xilinx Virtex II FPGA family, by applying pipelining ...
ETD2000
1995
15 years 1 months ago
1995
This paper reports the application of evolutionary computation in the automatic generation of a neural network architecture.It is a usual practice to use trial and error to find a...
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MPC
1995
Springer
15 years 1 months ago
1995
Springer
Abstract. We present a strategy to develop, in a functional setting, correct, e cient and portable Divide-and-Conquer (DC) programs for massively parallel architectures. Starting f...