Sciweavers

3120 search results - page 46 / 624
» An optimal architecture for a DDC
Sort
View
CODES
2004
IEEE
15 years 1 months ago
Multi-objective mapping for mesh-based NoC architectures
In this paper we present an approach to multi-objective exploration of the mapping space of a mesh-based network-on-chip architecture. Based on evolutionary computing techniques, ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
DATE
2004
IEEE
131views Hardware» more  DATE 2004»
15 years 1 months ago
Efficient Modular Testing of SOCs Using Dual-Speed TAM Architectures
The increasing complexity of system-on-chip (SOC) integrated circuits has spurred the development of versatile automatic test equipment (ATE) that can simultaneously drive differe...
Anuja Sehgal, Krishnendu Chakrabarty
FPGA
2006
ACM
156views FPGA» more  FPGA 2006»
15 years 1 months ago
A reconfigurable architecture for network intrusion detection using principal component analysis
In this paper, we develop an architecture for principal component analysis (PCA) to be used as an outlier detection method for high-speed network intrusion detection systems (NIDS...
David T. Nguyen, Gokhan Memik, Alok N. Choudhary
ASPDAC
1995
ACM
116views Hardware» more  ASPDAC 1995»
15 years 1 months ago
A datapath synthesis system for the reconfigurable datapath architecture
Abstract — A datapath synthesis system (DPSS) for the reconfigurable datapath architecture (rDPA) is presented. The DPSS allows automatic mapping of high level descriptions onto...
Reiner W. Hartenstein, Rainer Kress
ECIR
2007
Springer
14 years 11 months ago
A Hierarchical Consensus Architecture for Robust Document Clustering
Abstract. A major problem encountered by text clustering practitioners is the difficulty of determining a priori which is the optimal text representation and clustering technique f...
Xavier Sevillano, Germán Cobo, Francesc Al&...