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VLSISP
2008
111views more  VLSISP 2008»
14 years 10 months ago
Design Methodology for Throughput Optimum Architectures of Hash Algorithms of the MD4-class
Abstract. In this paper we propose an architecture design methodology to optimize the throughput of MD4-based hash algorithms. The proposed methodology includes an iteration bound ...
Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede
DAC
2005
ACM
14 years 12 months ago
Circuit optimization using statistical static timing analysis
In this paper, we propose a new sensitivity based, statistical gate sizing method. Since circuit optimization effects the entire shape of the circuit delay distribution, it is dif...
Aseem Agarwal, Kaviraj Chopra, David Blaauw, Vladi...
DSD
2010
IEEE
140views Hardware» more  DSD 2010»
14 years 10 months ago
Optimization of Area and Delay at Gate-Level in Multiple Constant Multiplications
—Although many efficient high-level algorithms have been proposed for the realization of Multiple Constant Multiplications (MCM) using the fewest number of addition and subtract...
Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos&...
DAC
2010
ACM
14 years 10 months ago
Parallel hierarchical cross entropy optimization for on-chip decap budgeting
Decoupling capacitor (decap) placement has been widely adopted as an effective way to suppress dynamic power supply noise. Traditional decap budgeting algorithms usually explore t...
Xueqian Zhao, Yonghe Guo, Zhuo Feng, Shiyan Hu
WICON
2010
14 years 7 months ago
Optimized Content Caching and Request Capture in CNF Networks
In order to meet the overwhelming demands of content retrieval for mobile end users, a novel architecture for the next-generation Internet called Cache-and-Forward (CNF) has been p...
Lijun Dong, Dan Zhang, Yanyong Zhang, Dipankar Ray...