Abstract—The peer-to-peer networking concept has revolutionized the cost structure of Internet data dissemination by making large scale content delivery with low server cost feas...
SRAM design has been a major challenge for nanoscale manufacturing technology. We propose a new bit cell repair scheme for designing maximum-information memory system (MIMS). Unli...
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
This paper presents how to find optimized buffer size for VLSI architectures of full-search block matching algorithms. Starting from the DG (dependency graph) analysis, we focus i...
Abstract--In previous research, we have designed and successfully tested a Traffic Light Cycles Evolutionary Optimization Architecture. In this paper, we attempt to validate those ...