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» An optimal architecture for a DDC
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DAC
1995
ACM
15 years 1 months ago
Hierarchical Optimization of Asynchronous Circuits
Abstract— Many asynchronous designs are naturally specified and implemented hierarchically as an interconnection of separate asynchronous modules that operate concurrently and c...
Bill Lin, Gjalt G. de Jong, Tilman Kolks
ESANN
2004
14 years 11 months ago
Evolutionary Optimization of Neural Networks for Face Detection
For face recognition from video streams speed and accuracy are vital aspects. The first decision whether a preprocessed image region represents a human face or not is often made by...
Stefan Wiegand, Christian Igel, Uwe Handmann
MICRO
1997
IEEE
116views Hardware» more  MICRO 1997»
15 years 2 months ago
Tuning Compiler Optimizations for Simultaneous Multithreading
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...
Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay ...
DATE
2009
IEEE
91views Hardware» more  DATE 2009»
15 years 1 months ago
Optimizing the HW/SW boundary of an ECC SoC design using control hierarchy and distributed storage
Abstract--Hardware/Software codesign of Elliptic Curve Cryptography has been extensively studied in recent years. However, most of these designs have focused on the computational a...
Xu Guo, Patrick Schaumont
AAAI
2012
13 years 12 days ago
Design and Optimization of an Omnidirectional Humanoid Walk: A Winning Approach at the RoboCup 2011 3D Simulation Competition
This paper presents the design and learning architecture for an omnidirectional walk used by a humanoid robot soccer agent acting in the RoboCup 3D simulation environment. The wal...
Patrick MacAlpine, Samuel Barrett, Daniel Urieli, ...