189 search results - page 14 / 38 » An ultra-fast instruction set simulator |
121
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SBACPAD
2005
IEEE
15 years 7 months ago
2005
IEEE
The time required to simulate a complete benchmark program using the cycle-accurate model of a microprocessor can be prohibitively high. One of the proposed methodologies, represe...
151
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CODES
2009
IEEE
15 years 8 months ago
2009
IEEE
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
106
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CASES
2006
ACM
15 years 5 months ago
2006
ACM
This paper proposes an efficient method to analyze worst case interruption delay (WCID) of a workload running on modern microprocessors using a cycle accurate simulator (CAS). Our...
117
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ICCD
2003
IEEE
15 years 11 months ago
2003
IEEE
Compiled simulation is a well known technique for improving the performance of instruction set simulators at the cost of compilation time. However the compilation time overhead ma...
113
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WSC
1996
15 years 3 months ago
1996
The author is revising and restructuring an existing simulation course designed primarily for senior computer science majors by: 1) developing an integrated set of laboratory exer...