189 search results - page 18 / 38 » An ultra-fast instruction set simulator |
ITICSE
1999
ACM
15 years 6 months ago
1999
ACM
This paper shows how a multimedia multi-framed simulation generator was developed. A technique of recording a sequence of steps and playing them back as an animation overcomes the...
SBACPAD
2004
IEEE
15 years 3 months ago
2004
IEEE
High-performance superscalar processors are designed with the help of complex simulation environment. The simulation infrastructure permits to validate the processor instruction s...
114
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DAC
2005
ACM
15 years 3 months ago
2005
ACM
This paper proposes a rapid and accurate evaluation scheme for cycle counts of a pipelined processor using evaluation reuse technique. Since exploration of an optimal processor is...
135
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DAC
2003
ACM
16 years 2 months ago
2003
ACM
The capability of performing architectural exploration has become essential for embedded microprocessor design in System-On-Chip. While many retargetable instruction set (ISA) sim...
139
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EH
2004
IEEE
15 years 5 months ago
2004
IEEE
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...