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ISCA
2006
IEEE
125views Hardware» more  ISCA 2006»
15 years 8 months ago
Architectural Semantics for Practical Transactional Memory
Transactional Memory (TM) simplifies parallel programming by allowing for parallel execution of atomic tasks. Thus far, TM systems have focused on implementing transactional stat...
Austen McDonald, JaeWoong Chung, Brian D. Carlstro...
ET
2007
101views more  ET 2007»
15 years 1 months ago
Towards Nanoelectronics Processor Architectures
In this paper, we focus on reliability, one of the most fundamental and important challenges, in the nanoelectronics environment. For a processor architecture based on the unreliab...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
DSD
2009
IEEE
124views Hardware» more  DSD 2009»
15 years 8 months ago
Network-on-Chip Architecture Exploration Framework
— In this paper, we present a novel framework for the automated generation of Network-on-Chips (NoC) architectures, that enables architecture exploration and optimization. The au...
Timo Schönwald, Jochen Zimmermann, Oliver Bri...
LCTRTS
2010
Springer
15 years 8 months ago
Versatile system-level memory-aware platform description approach for embedded MPSoCs
In this paper, we present a novel system modeling language which targets primarily the development of source-level multiprocessor memory aware optimizations. In contrast to previo...
Robert Pyka, Felipe Klein, Peter Marwedel, Stylian...
SAMOS
2007
Springer
15 years 8 months ago
A Study of Energy Saving in Customizable Processors
Abstract. Embedded systems are special purpose systems which perform predefined tasks with very specific requirements like high performance, low volume or low power. Most of the ...
Paolo Bonzini, Dilek Harmanci, Laura Pozzi