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» An ultra-fast instruction set simulator
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ISCA
2005
IEEE
113views Hardware» more  ISCA 2005»
15 years 7 months ago
Piecewise Linear Branch Prediction
Improved branch prediction accuracy is essential to sustaining instruction throughput with today’s deep pipelines. We introduce piecewise linear branch prediction, an idealized ...
Daniel A. Jiménez
EUROPAR
2003
Springer
15 years 7 months ago
Obtaining Hardware Performance Metrics for the BlueGene/L Supercomputer
Hardware performance monitoring is the basis of modern performance analysis tools for application optimization. We are interested in providing such performance analysis tools for t...
Pedro Mindlin, José R. Brunheroto, Luiz De ...
ICRA
2002
IEEE
148views Robotics» more  ICRA 2002»
15 years 6 months ago
A Neural Approach to Adaptive Behavior and Multi-Sensor Action Selection in a Mobile Device
Sampling multisensory information and taking the appropriate motor action is critical for a biological organism’s survival, but a difficult task for robots. We present a Neurally...
Jeffrey L. Krichmar, James A. Snook
RTSS
2002
IEEE
15 years 6 months ago
Embedded System Design Framework for Minimizing Code Size and Guaranteeing Real-Time Requirements
In addition to real-time requirements, the program code size is a critical design factor for real-time embedded systems. To take advantage of the code size vs. execution time trad...
Insik Shin, Insup Lee, Sang Lyul Min
ISCA
1997
IEEE
120views Hardware» more  ISCA 1997»
15 years 6 months ago
Run-Time Adaptive Cache Hierarchy Management via Reference Analysis
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
Teresa L. Johnson, Wen-mei W. Hwu