17 search results - page 2 / 4 » Analog Placement Based on Novel Symmetry-Island Formulation |
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
ICC
2008
IEEE
15 years 4 months ago
2008
IEEE
—For the sake of maximizing the network lifetime, we propose a novel placement scheme for mobile data collectors in Underwater Acoustic Sensor Networks (UASNs). Our scheme is bas...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
—In modern sub-micron design, achieving low-skew clock distributions is facing challenges for high-performance circuits. Symmetric global clock distribution and clock tree synthe...
DAC
2006
ACM
15 years 10 months ago
2006
ACM
As the technology node advances into the nanometer era, via-open defects are one of the dominant failures. To improve via yield and reliability, redundant-via insertion is a highl...
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...