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VLSID
1999
IEEE
93views VLSI» more  VLSID 1999»
15 years 1 months ago
Spec-Based Repeater Insertion and Wire Sizing for On-chip Interconnect
Recently Lillis, et al. presented an elegant dynamic programming approach to RC interconnect delay optimization through driver sizing, repeater insertion, and, wire sizing which e...
Noel Menezes, Chung-Ping Chen
ICCD
2001
IEEE
121views Hardware» more  ICCD 2001»
15 years 6 months ago
Determining Schedules for Reducing Power Consumption Using Multiple Supply Voltages
Dynamic power is the main source of power consumption in CMOS circuits. It depends on the square of the supply voltage. It may significantly be reduced by scaling down the supply ...
Noureddine Chabini, El Mostapha Aboulhamid, Yvon S...
ISCAS
2006
IEEE
118views Hardware» more  ISCAS 2006»
15 years 3 months ago
A robust continuous-time multi-dithering technique for laser communications using adaptive optics
A robust system architecture to achieve optical coherency free optimization. Several methods that had been proposed in the in multiple-beam free-space laser communication links wit...
Dimitrios N. Loizos, Paul-Peter Sotiriadis, Gert C...
DAC
2005
ACM
14 years 11 months ago
Timing-driven placement by grid-warping
Grid-warping is a recent placement strategy based on a novel physical analogy: rather than move the gates to optimize their location, it elastically deforms a model of the 2-D chi...
Zhong Xiu, Rob A. Rutenbar
ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
15 years 3 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock