208 search results - page 32 / 42 » Analog circuits optimization based on evolutionary computati... |
VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
IDDQ testing has been used as a test technique to supplement voltage testing of CMOS chips. The idea behind IDDQ testing is to declare a chip as faulty if the steady-state current...
IACR
2011
13 years 9 months ago
2011
We present a radically new approach to fully homomorphic encryption (FHE) that dramatically improves performance and bases security on weaker assumptions. A central conceptual con...
GECCO
2006
Springer
15 years 1 months ago
2006
Springer
This paper presents a methodology for using heuristic search methods to optimise cancer chemotherapy. Specifically, two evolutionary algorithms - Population Based Incremental Lear...
DAC
2005
ACM
15 years 10 months ago
2005
ACM
MiniBit, our automated approach for optimizing bit-widths of fixed-point designs is based on static analysis via affine arithmetic. We describe methods to minimize both the intege...
VLSID
2009
IEEE
15 years 10 months ago
2009
IEEE
We present the automatic test pattern generator TIGUAN based on a thread-parallel SAT solver. Due to a tight integration of the SAT engine into the ATPG algorithm and a carefully ...