In this paper, we propose a novel approach of image annotation by constructing a hierarchical mapping between lowlevel visual features and text features utilizing the relations wi...
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
Meeting timing constraint is one of the most important issues for modern design automation tools. This situation is exacerbated with the existence of process variation. Current hi...
Modern CMOS manufacturing processes have significant variability, which necessitates guard banding to achieve reasonable yield. It is our thesis that variability should be addres...
Abstract—Delay Tolerant Networks (DTNs) are wireless networks in which at any given time instance, the probability of having a complete path from a source to destination is low d...