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109
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DATE
2000
IEEE
86views Hardware» more  DATE 2000»
15 years 8 months ago
Analysis and Minimization of Test Time in a Combined BIST and External Test Approach
In this paper, an analysis of test time by CBET (which is an acronym for Combination of BIST and External Test) test approach is presented. The analysis validates that CBET test a...
Makoto Sugihara, Hiroto Yasuura, Hiroshi Date
110
Voted
WG
2007
Springer
15 years 9 months ago
Lower Bounds for Three Algorithms for the Transversal Hypergraph Generation
Abstract. The computation of all minimal transversals of a given hypergraph in output-polynomial time is a long standing open question known as the transversal hypergraph generatio...
Matthias Hagen
122
Voted
JAR
2007
132views more  JAR 2007»
15 years 3 months ago
Visualizing SAT Instances and Runs of the DPLL Algorithm
SAT-solvers have turned into essential tools in many areas of applied logic like, for example, hardware verification or satisfiability checking modulo theories (SMT). And althoug...
Carsten Sinz
124
Voted
ASPDAC
2005
ACM
99views Hardware» more  ASPDAC 2005»
15 years 5 months ago
A fast counterexample minimization approach with refutation analysis and incremental SAT
- It is a hotly research topic to eliminate irrelevant variables from counterexample, to make it easier to be understood. BFL algorithm is the most effective Counterexample minim...
ShengYu Shen, Ying Qin, Sikun Li
136
Voted
JMIV
2010
107views more  JMIV 2010»
14 years 10 months ago
Block Based Deconvolution Algorithm Using Spline Wavelet Packets
This paper proposes robust algorithms to deconvolve discrete noised signals and images. The solutions are derived as linear combinations of spline wavelet packets that minimize so...
Amir Averbuch, Valery A. Zheludev, Pekka Neittaanm...