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TVLSI
2008
150views more  TVLSI 2008»
14 years 9 months ago
Data Memory Subsystem Resilient to Process Variations
As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance o...
M. Bennaser, Yao Guo, Csaba Andras Moritz
VLSID
2006
IEEE
142views VLSI» more  VLSID 2006»
15 years 10 months ago
Impact of Configurability and Extensibility on IPSec Protocol Execution on Embedded Processors
- Security protocols, such as IPSec and SSL, are being increasingly deployed in the context of networked embedded systems. The resource-constrained nature of embedded systems and, ...
Nachiketh R. Potlapally, Srivaths Ravi, Anand Ragh...
ICPP
1999
IEEE
15 years 1 months ago
Coherence-Centric Logging and Recovery for Home-Based Software Distributed Shared Memory
The probability of failures in software distributed shared memory (SDSM) increases as the system size grows. This paper introduces a new, efficient message logging technique, call...
Angkul Kongmunvattana, Nian-Feng Tzeng
87
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JCIT
2007
158views more  JCIT 2007»
14 years 9 months ago
A Guidance Process for the Selection of Business Process Modelling Techniques for the Revised Business Process Reengineering
Business Process Reengineering is a reverse design process that allows for radical improvement in quality, service, cycle times, productivity and cost for a specific market or cus...
Leila Jamel Menzli, Sonia Ayachi Ghannouchi, Henda...
IPPS
2003
IEEE
15 years 2 months ago
Active Memory Techniques for ccNUMA Multiprocessors
Our recent work on uniprocessor and single-node multiprocessor (SMP) active memory systems uses address remapping techniques in conjunction with extended cache coherence protocols...
Daehyun Kim, Mainak Chaudhuri, Mark Heinrich