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» Analysis of a reconfigurable network processor
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DSD
2008
IEEE
136views Hardware» more  DSD 2008»
15 years 6 months ago
Network Interface Sharing Techniques for Area Optimized NoC Architectures
Although preliminary analysis frameworks point out the performance speed-ups achievable by on-chip networks with respect to state-of-the-art interconnects, the area concern remain...
Alberto Ferrante, Simone Medardoni, Davide Bertozz...
ITCC
2005
IEEE
15 years 5 months ago
A Framework for Key Management in Mobile Ad Hoc Networks
Background: Key management in a mobile ad hoc environment is complicated by frequently partitioning network topology. Recently proposed key management systems (KMSs) provide limit...
George C. Hadjichristofi, William Joseph Adams, Na...
HPCC
2009
Springer
15 years 4 months ago
Load Scheduling Strategies for Parallel DNA Sequencing Applications
This paper studies a load scheduling strategy with nearoptimal processing time leveraging the computational characteristics of parallel DNA sequence alignment algorithms, specific...
Sudha Gunturu, Xiaolin Li, Laurence Tianruo Yang
HPCA
2000
IEEE
15 years 4 months ago
Impact of Heterogeneity on DSM Performance
This paper explores area/parallelism tradeo s in the design of distributed shared-memory (DSM) multiprocessors built out of large single-chip computing nodes. In this context, are...
Renato J. O. Figueiredo, José A. B. Fortes
PLDI
2006
ACM
15 years 5 months ago
Continuations and transducer composition
On-line transducers are an important class of computational agent; we construct and compose together many software systems using them, such as stream processors, layered network p...
Olin Shivers, Matthew Might