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» Analysis of a reconfigurable network processor
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SIROCCO
2000
15 years 1 months ago
Cooperative computing with fragmentable and mergeable groups
ABSTRACT: This work considers the problem of performing a set of N tasks on a set of P cooperating message-passing processors (P N). The processors use a group communication servi...
Chryssis Georgiou, Alexander A. Shvartsman
IPPS
2009
IEEE
15 years 6 months ago
Implementing and evaluating multithreaded triad census algorithms on the Cray XMT
Commonly represented as directed graphs, social networks depict relationships and behaviors among social entities such as people, groups, and organizations. Social network analysi...
George Chin Jr., Andrès Márquez, Sut...
CIMCA
2008
IEEE
15 years 6 months ago
Space Based Architecture for Numerical Solving
A strategy for the analytical solving of ordinary differential equations and a first implementation of it based on mobile agent community, using jini javaspace framework, are pre...
Cyril Dumont, Fabrice Mourlin
IPPS
2006
IEEE
15 years 5 months ago
Parallel implementation of a quartet-based algorithm for phylogenetic analysis
This paper describes a parallel implementation of our recently developed algorithm for phylogenetic analysis on the IBM BlueGene/L cluster [15]. This algorithm constructs evolutio...
Bing Bing Zhou, Daniel Chu, Monther Tarawneh, Ping...
DATE
2003
IEEE
132views Hardware» more  DATE 2003»
15 years 5 months ago
Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
Youngchul Cho, Ganghee Lee, Sungjoo Yoo, Kiyoung C...