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2002
IEEE
15 years 4 months ago
Writing Temporally Predictable Code
The Worst-Case Execution-Time Analysis (WCET Analysis) of program code that is to be executed on modern processors is a highly complex task. First, it involves path analysis, to i...
Peter P. Puschner, Alan Burns
IPPS
1999
IEEE
15 years 3 months ago
Run-Time Selection of Block Size in Pipelined Parallel Programs
Parallelizing compiler technology has improved in recent years. One area in which compilers have made progress is in handling DOACROSS loops, where crossprocessor data dependencie...
David K. Lowenthal, Michael James
ICCD
2005
IEEE
159views Hardware» more  ICCD 2005»
15 years 5 months ago
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
90
Voted
CGO
2004
IEEE
15 years 3 months ago
Probabilistic Predicate-Aware Modulo Scheduling
Predicated execution enables the removal of branches by converting segments of branching code into sequences of conditional operations. An important side effect of this transforma...
Mikhail Smelyanskiy, Scott A. Mahlke, Edward S. Da...
79
Voted
HPCA
2008
IEEE
15 years 12 months ago
Performance-aware speculation control using wrong path usefulness prediction
Fetch gating mechanisms have been proposed to gate the processor pipeline to reduce the wasted energy consumption due to wrongpath (i.e. mis-speculated) instructions. These scheme...
Chang Joo Lee, Hyesoon Kim, Onur Mutlu, Yale N. Pa...