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» Analysis of power consumption in VLSI global interconnects
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ICCAD
2004
IEEE
118views Hardware» more  ICCAD 2004»
15 years 8 months ago
Optimizing mode transition sequences in idle intervals for component-level and system-level energy minimization
New embedded systems offer rich power management features in the form of multiple operational and non-operational power modes. While they offer mechanisms for better energy effic...
Jinfeng Liu, Pai H. Chou
VLSID
2006
IEEE
148views VLSI» more  VLSID 2006»
16 years 2 days ago
Efficient Design and Analysis of Robust Power Distribution Meshes
With increasing design complexity, as well as continued scaling of supplies, the design and analysis of power/ground distribution networks poses a difficult problem in modern IC d...
Puneet Gupta, Andrew B. Kahng
ISQED
2003
IEEE
133views Hardware» more  ISQED 2003»
15 years 5 months ago
Impact of Interconnect Pattern Density Information on a 90nm Technology ASIC Design Flow
The importance of an interconnect pattern density model in ASIC design flow for a 90nm technology is presented. It is shown that performing the timing analysis at the worst-case c...
Payman Zarkesh-Ha, S. Lakshminarayann, Ken Doniger...
DAC
2009
ACM
15 years 6 months ago
O-Router: an optical routing framework for low power on-chip silicon nano-photonic integration
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
Duo Ding, Yilin Zhang, Haiyu Huang, Ray T. Chen, D...
DAC
2000
ACM
16 years 20 days ago
GTX: the MARCO GSRC technology extrapolation system
Technology extrapolation -- the calibration and prediction of achievable design in future technology generations ? drives the evolution of VLSI system architectures, design method...
Andrew E. Caldwell, Yu Cao, Andrew B. Kahng, Farin...