111 search results - page 17 / 23 » Analysis of power consumption in VLSI global interconnects |
87
Voted
CORR
2010
Springer
14 years 9 months ago
2010
Springer
State of the art analyzers in the Logic Programming (LP) paradigm are nowadays mature and sophisticated. They allow inferring a wide variety of global properties including terminat...
ISCAS
1999
IEEE
15 years 1 months ago
1999
IEEE
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...
CF
2006
ACM
15 years 3 months ago
2006
ACM
In this paper, we present a nano-scale reconfigurable mesh that is interconnected with ferromagnetic spin-wave buses. The architecture described here, while requiring the same num...
ASPDAC
2009
ACM
2009
ACM
Reconfigurable double gate carbon nanotube field effect transistor based nanoelectronic architecture
15 years 1 months ago
-- Carbon nanotubes (CNTs) and carbon nanotube field effect transistors (CNFETs) have demonstrated extraordinary properties and are widely accepted as the building blocks of next g...
GLVLSI
2006
IEEE
15 years 3 months ago
2006
IEEE
3-dimensional integrated circuit (3D IC) technology places circuit blocks in the vertical dimension in addition to the conventional horizontal plane. Compared to conventional plan...