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» Analysis of speculative prefetching
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CODES
2006
IEEE
15 years 4 months ago
A bus architecture for crosstalk elimination in high performance processor design
In deep sub-micron technology, the crosstalk effect between adjacent wires has become an important issue, especially between long on-chip buses. This effect leads to the increas...
Wen-Wen Hsieh, Po-Yuan Chen, TingTing Hwang
IEEEPACT
2006
IEEE
15 years 4 months ago
Whole-program optimization of global variable layout
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
Nathaniel McIntosh, Sandya Mannarswamy, Robert Hun...
SBACPAD
2006
IEEE
102views Hardware» more  SBACPAD 2006»
15 years 4 months ago
Ultra-Fast CPU Performance Prediction: Extending the Monte Carlo Approach
Performance evaluation of contemporary processors is becoming increasingly difficult due to the lack of proper frameworks. Traditionally, cycle-accurate simulators have been exte...
Ram Srinivasan, Jeanine Cook, Olaf M. Lubeck
ICDCS
2005
IEEE
15 years 4 months ago
A Spatiotemporal Query Service for Mobile Users in Sensor Networks
This paper presents MobiQuery, a spatiotemporal query service that allows mobile users to periodically gather information from their surrounding areas through a wireless sensor ne...
Chenyang Lu, Guoliang Xing, Octav Chipara, Chien-L...
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IEEEPACT
2002
IEEE
15 years 3 months ago
Using the Compiler to Improve Cache Replacement Decisions
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
Zhenlin Wang, Kathryn S. McKinley, Arnold L. Rosen...