Sciweavers

2036 search results - page 41 / 408
» Analysis of the XC6000 Architecture for Embedded System Desi...
Sort
View
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
15 years 3 months ago
A non-uniform cache architecture for low power system design
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
Tohru Ishihara, Farzan Fallah
GECCO
2008
Springer
199views Optimization» more  GECCO 2008»
14 years 11 months ago
Analysis of multi-objective evolutionary algorithms to optimize dynamic data types in embedded systems
New multimedia embedded applications are increasingly dynamic, and rely on Dynamically-allocated Data Types (DDTs) to store their data. The optimization of DDTs for each target em...
José Ignacio Hidalgo, José L. Risco-...
AHS
2007
IEEE
251views Hardware» more  AHS 2007»
15 years 2 months ago
System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
Ali Ahmadinia, Balal Ahmad, Tughrul Arslan
CODES
2008
IEEE
15 years 4 months ago
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
Frank E. B. Ophelders, Samarjit Chakraborty, Henk ...
DAC
2005
ACM
15 years 11 months ago
Memory access optimization through combined code scheduling, memory allocation, and array binding in embedded system design
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
Jungeun Kim, Taewhan Kim