Sciweavers

378 search results - page 73 / 76
» Analytical Modeling of Pipeline Parallelism
Sort
View
CCGRID
2003
IEEE
15 years 2 months ago
Scheduling Distributed Applications: the SimGrid Simulation Framework
— Since the advent of distributed computer systems an active field of research has been the investigation of scheduling strategies for parallel applications. The common approach...
Arnaud Legrand, Loris Marchal, Henri Casanova
HPCA
2005
IEEE
15 years 9 months ago
Voltage and Frequency Control With Adaptive Reaction Time in Multiple-Clock-Domain Processors
Dynamic voltage and frequency scaling (DVFS) is a widely-used method for energy-efficient computing. In this paper, we present a new intra-task online DVFS scheme for multiple clo...
Qiang Wu, Philo Juang, Margaret Martonosi, Douglas...
104
Voted
CODES
2005
IEEE
15 years 3 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
VLDB
1998
ACM
180views Database» more  VLDB 1998»
15 years 1 months ago
Active Storage for Large-Scale Data Mining and Multimedia
The increasing performance and decreasing cost of processors and memory are causing system intelligence to move into peripherals from the CPU. Storage system designers are using t...
Erik Riedel, Garth A. Gibson, Christos Faloutsos
IEEEPACT
2006
IEEE
15 years 3 months ago
Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. I...