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ISPAN
2000
IEEE
15 years 2 months ago
Versatile Processor Design for Efficiency and High Performance
We present new architectural concepts for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2 -CPU (Data-Driven processor) follows the natura...
Sotirios G. Ziavras
AINA
2006
IEEE
15 years 3 months ago
Modeling, Predicting and Optimizing Redistribution between Clusters on Low Latency Networks
In this paper we study the problem of scheduling messages between two parallel machines connected by a low latency network during a data redistribution. We compare two approaches....
Emmanuel Jeannot, Frédéric Wagner
MICCAI
2002
Springer
15 years 10 months ago
Robust Registration of Multi-modal Images: Towards Real-Time Clinical Applications
Abstract. High performance computing has become a key step to introduce computer tools, like real-time registration, in the medical field. To achieve real-time processing, one usua...
Radu Stefanescu, Sébastien Ourselin, Xavier...
CCGRID
2007
IEEE
15 years 4 months ago
Performance Evaluation in Grid Computing: A Modeling and Prediction Perspective
Experimental performance studies on computer systems, including Grids, require deep understandings on their workload characteristics. The need arises from two important and closel...
Hui Li
JUCS
2000
120views more  JUCS 2000»
14 years 9 months ago
Execution and Cache Performance of the Scheduled Dataflow Architecture
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...
Krishna M. Kavi, Joseph Arul, Roberto Giorgi