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ISCA
1993
IEEE
157views Hardware» more  ISCA 1993»
15 years 4 months ago
The Performance of Cache-Coherent Ring-based Multiprocessors
Advances in circuit and integration technology are continuously boosting the speed of microprocessors. One of the main challenges presented by such developments is the effective u...
Luiz André Barroso, Michel Dubois
CGO
2007
IEEE
15 years 6 months ago
Persistent Code Caching: Exploiting Code Reuse Across Executions and Applications
Run-time compilation systems are challenged with the task of translating a program’s instruction stream while maintaining low overhead. While software managed code caches are ut...
Vijay Janapa Reddi, Dan Connors, Robert Cohn, Mich...
EMSOFT
2009
Springer
15 years 6 months ago
Probabilistic modeling of data cache behavior
In this paper, we propose a formal analysis approach to estimate the expected (average) data cache access time of an application across all possible program inputs. Towards this g...
Vinayak Puranik, Tulika Mitra, Y. N. Srikant
VLDB
2002
ACM
120views Database» more  VLDB 2002»
14 years 11 months ago
Improving Data Access of J2EE Applications by Exploiting Asynchronous Messaging and Caching Services
The J2EE platform provides a variety of options for making business data persistent using DBMS technology. However, the integration with existing backend database systems has prov...
Samuel Kounev, Alejandro P. Buchmann
HPCA
2005
IEEE
16 years 7 days ago
Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
Aamer Jaleel, Bruce L. Jacob