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DAC
2002
ACM
16 years 25 days ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy
SIGMETRICS
1998
ACM
15 years 4 months ago
Modeling Set Associative Caches Behavior for Irregular Computations
While much work has been devoted to the study of cache behavior during the execution of codes with regular access patterns, little attention has been paid to irregular codes. An i...
Basilio B. Fraguela, Ramon Doallo, Emilio L. Zapat...
DAC
2003
ACM
16 years 25 days ago
Accurate timing analysis by modeling caches, speculation and their interaction
Schedulability analysis of real-time embedded systems requires worst case timing guarantees of embedded software performance. This involves not only language level program analysi...
Xianfeng Li, Tulika Mitra, Abhik Roychoudhury
JLP
2007
95views more  JLP 2007»
14 years 11 months ago
Model checking a cache coherence protocol of a Java DSM implementation
Jackal is a fine-grained distributed shared memory implementation of the Java programming language. It aims to implement Java’s memory model and allows multithreaded Java progr...
Jun Pang, Wan Fokkink, Rutger F. H. Hofman, Ronald...
MASCOTS
2003
15 years 1 months ago
An integrated performance model of disk arrays
All enterprise storage systems depend on disk arrays to satisfy their capacity, reliability, and availability requirements. Performance models of disk arrays are useful in underst...
Elizabeth Varki, Arif Merchant, Jianzhang Xu, Xiao...