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TVLSI
2008
164views more  TVLSI 2008»
15 years 20 days ago
Dynamically Configurable Bus Topologies for High-Performance On-Chip Communication
The on-chip communication architecture is a major determinant of overall performance in complex System-on-Chip (SoC) designs. Since the communication requirements of SoC components...
Krishna Sekar, Kanishka Lahiri, Anand Raghunathan,...
112
Voted
DAC
2008
ACM
16 years 1 months ago
The synthesis of robust polynomial arithmetic with stochastic logic
As integrated circuit technology plumbs ever greater depths in the scaling of feature sizes, maintaining the paradigm of deterministic Boolean computation is increasingly challeng...
Weikang Qian, Marc D. Riedel
88
Voted
DAC
2006
ACM
16 years 1 months ago
Fast algorithms for slew constrained minimum cost buffering
As a prevalent constraint, sharp slew rate is often required in circuit design which causes a huge demand for buffering resources. This problem requires ultra-fast buffering techn...
Shiyan Hu, Charles J. Alpert, Jiang Hu, Shrirang K...
GLVLSI
2007
IEEE
141views VLSI» more  GLVLSI 2007»
15 years 7 months ago
Transition-activity aware design of reduction-stages for parallel multipliers
We propose an interconnect reorganization algorithm for reduction stages in parallel multipliers. It aims at minimizing power consumption for given static probabilities at the pri...
Saeeid Tahmasbi Oskuii, Per Gunnar Kjeldsberg, Osc...
SIGUCCS
2003
ACM
15 years 6 months ago
A simple web content management tool as the solution to a web site redesign
Before embarking upon a large web site project, whether creating a new site or just redesigning one, it is generally accepted practice not to begin work until all the problem spec...
David Thomas Dudek, Heidi A. Wieczorek