2204 search results - page 203 / 441 » Analyzing architectural styles |
85
Voted
DAC
2007
ACM
16 years 1 months ago
2007
ACM
In many designs, the worst-case-delay path may never be exercised or may be exercised infrequently. For those designs, a strategy of optimizing a circuit for the worst-case condit...
DAC
2007
ACM
16 years 1 months ago
2007
ACM
We propose a design and optimization methodology for high performance and ultra low power digital applications on flexible substrate using Low Temperature Polycrystalline Silicon ...
108
click to vote
DAC
2002
ACM
16 years 1 months ago
2002
ACM
Reducing power dissipation is one of the most principle subjects in VLSI design today. Scaling causes subthreshold leakage currents to become a large component of total power diss...
118
click to vote
DAC
2003
ACM
16 years 1 months ago
2003
ACM
Sleep transistors are effective to reduce dynamic and leakage power. The cluster-based design was proposed to reduce the sleep transistor area by clustering gates to minimize the ...
122
Voted
DAC
2004
ACM
16 years 1 months ago
2004
ACM
Power optimization is of growing importance for FPGAs in nanometer technologies. Considering dual-Vdd technique, we show that configurable power supply is required to obtain a sat...