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110
Voted
ASAP
2000
IEEE
125views Hardware» more  ASAP 2000»
15 years 5 months ago
High Level Modeling for Parallel Executions of Nested Loop Algorithms
High level modeling and (quantitative) performance analysis of signal processing systems requires high level models for the applications(algorithms) and the implementations (archi...
Ed F. Deprettere, Edwin Rijpkema, Paul Lieverse, B...
FPGA
1999
ACM
122views FPGA» more  FPGA 1999»
15 years 5 months ago
Exploiting FPGA-Features During the Emulation of a Fast Reactive Embedded System
This paper presents the emulation of an embedded system with hard real time constraints and response times of about 220µs. We show that for such fast reactive systems, the softwa...
Karlheinz Weiß, Thorsten Steckstor, Gernot K...
98
Voted
IWPC
1998
IEEE
15 years 5 months ago
DIME: A Direct Manipulation Environment for Evolutionary Development of Software
This paper presents an overview of the DIME environment (DIrect Manipulation Environment) being developed by the author. The paper presents the DIME vision, its catalogue of evolu...
Arun Lakhotia
VTS
1998
IEEE
97views Hardware» more  VTS 1998»
15 years 5 months ago
On the Identification of Optimal Cellular Automata for Built-In Self-Test of Sequential Circuits
This paper presents a BIST architecture for Finite State Machines that exploits Cellular Automata (CA) as pattern generators and signature analyzers. The main advantage of the pro...
Fulvio Corno, Nicola Gaudenzi, Paolo Prinetto, Mat...
ISLPED
1998
ACM
86views Hardware» more  ISLPED 1998»
15 years 5 months ago
The energy complexity of register files
Register files (RF) represent a substantial portion of the energy budget in modern processors, and are growing rapidly with the trend towards wider instruction issue. The actual ...
Victor V. Zyuban, Peter M. Kogge