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DAC
1994
ACM
15 years 4 months ago
Clock Period Optimization During Resource Sharing and Assignment
- This paper analyzes the effect of resource sharing and assignment on the clock period of the synthesized circuit. We focus on behavioral specifications with mutually exclusive pa...
Subhrajit Bhattacharya, Sujit Dey, Franc Brglez
IPPS
1992
IEEE
15 years 4 months ago
CCHIME: A Cache Coherent Hybrid Interconnected Memory Extension
This paper presents a hybrid shared memory architecture which combines the scalability of a multistage interconnection network with the contention reduction benefits of coherent c...
Matthew K. Farrens, Arvin Park, Allison Woodruff
DAC
2007
ACM
15 years 4 months ago
Effects of Coupling Capacitance and Inductance on Delay Uncertainty and Clock Skew
With the continuous increase of circuit density, interconnect length, and aspect ratio, the influence of capacitive and inductive coupling on timing characteristics of integrated ...
Abinash Roy, Noha H. Mahmoud, Masud H. Chowdhury
AICT
2006
IEEE
15 years 4 months ago
Classification of service for entertainment applications in vehicles
Generally, the real-time applications exchange information on dedicated network and the other traffic is supported by another communication system. The differentiation of these tw...
Jean-Philippe Georges, Eric Rondeau, Thierry Divou...
DAC
1995
ACM
15 years 4 months ago
Efficient Power Estimation for Highly Correlated Input Streams
- Power estimation in combinational modules is addressed from a probabilistic point of view. The zero-delay hypothesis is considered and under highly correlated input streams, the ...
Radu Marculescu, Diana Marculescu, Massoud Pedram