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ISLPED
2006
ACM
105views Hardware» more  ISLPED 2006»
15 years 8 months ago
Reducing power through compiler-directed barrier synchronization elimination
Interprocessor synchronization, while extremely important for ensuring execution correctness, can be very costly in terms of both power and performance overheads. Unfortunately, m...
Mahmut T. Kandemir, Seung Woo Son
84
Voted
ISSTA
2006
ACM
15 years 8 months ago
Breaking up is hard to do: an investigation of decomposition for assume-guarantee reasoning
Finite-state verification techniques are often hampered by the stateexplosion problem. One proposed approach for addressing this problem is assume-guarantee reasoning. Using rece...
Jamieson M. Cobleigh, George S. Avrunin, Lori A. C...
107
Voted
ACSD
2005
IEEE
90views Hardware» more  ACSD 2005»
15 years 8 months ago
Extensible and Scalable Time Triggered Scheduling
The objective of this paper is to present how to design a system that can accommodate additional functionality with either no changes to the design or adding architectural modules...
Wei Zheng, Jike Chong, Claudio Pinello, Sri Kanaja...
CGO
2005
IEEE
15 years 8 months ago
A Progressive Register Allocator for Irregular Architectures
Register allocation is one of the most important optimizations a compiler performs. Conventional graphcoloring based register allocators are fast and do well on regular, RISC-like...
David Koes, Seth Copen Goldstein
CSB
2005
IEEE
124views Bioinformatics» more  CSB 2005»
15 years 8 months ago
Discovering Functional Transcription Factor Binding from Superimposed Gene Networks
The availability of entire genome sequences, coupled with genome-wide studies of gene expression, offers promise for discovering new pathways along with their regulatory programs....
Matthew T. Weirauch, Joshua M. Stuart
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